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Serial-parallel access method (SPAM) for instruction cache performance improvement
(Maltepe Üniversitesi, 2009) Mohtashamzadeh, M.; Fathy, M.; Soryani, M.
Achieving to high fetch bandwidth and low power consumption are the more important challenges in cache performance. The approach to achieve these goals is to use way prediction in associative caches. Although this technique satisfies the above mentioned goals but it enforces some hardware complexities which could not be neglected. There are other techniques such as serial and parallel that have some advantages and disadvantages. In this paper we are introducing a method that is the combination of serial and parallel techniques which is named Serial-Parallel Access Method (SPAM). Performance and power consumption of proposed method has been compared to serial and parallel architecture. The results show that our proposed combined technique in comparison with serial increases Instruction Per Cycle (IPC) and power consumption. Also the results of comparing parallel and combined techniques show decreasing both in IPC and power consumption. Although the former decrease doesn’t look good, but the latter is more important especially in systems which power consumption is critical for.