Reduction of output İmpedance of buck converter with genetic algorithm
Küçük Resim Yok
Tarih
2022
Yazarlar
Dergi Başlığı
Dergi ISSN
Cilt Başlığı
Yayıncı
Balkan Yayın
Erişim Hakkı
info:eu-repo/semantics/openAccess
Özet
This paper introduces a technique to reduce the output impedance in the PWM buck converters with voltage-mode control (VMC) without requiring low Equivalent Series Resistance (ESR) output capacitors. Proposed technique uses the infinity norm (...) to convert the problem into an optimization problem. Obtained optimization problem is solved with the aid of Genetic Algorithm (GA). The proposed technique is applied to a sample buck converter operating in Continuous Conduction Mode (CCM). Simulink simulation is used to test the suggested method. Simulation results showed a considerable decrease in the low frequency region of output impedance. Such a decrease in output impedance is very desired for low voltage high current loads like computer CPU’s.
Açıklama
Anahtar Kelimeler
DC-DC converters, Load transients, Output impedance of buck converter, State Space Averaging (SSA)
Kaynak
Balkan Journal of Electrical and Computer Engineering
WoS Q Değeri
Scopus Q Değeri
Cilt
10
Sayı
3
Künye
Asadi, F. (2022). Reduction of output impedance of buck converter with genetic algorithm. Balkan Journal of Electrical and Computer Engineering, 10(3), s.317-322.
