Latch, Flip Flop and Shift Register
| dc.contributor.author | Asadi, Farzin | |
| dc.date.accessioned | 2024-07-12T21:40:31Z | |
| dc.date.available | 2024-07-12T21:40:31Z | |
| dc.date.issued | 2024 | en_US |
| dc.department | [Belirlenecek] | en_US |
| dc.description.abstract | Latches and flip flops are circuits that have two stable states that can store state information. Flip flops have clock input and change state on the clock pulse rising or falling edges. Therefore, flip flop is an edge triggered device. Latches have no clock pulse input and are level triggered devices. A Flip flop or a latch can be used to store one bit of data. A shift register is a type of digital circuit using a cascade of flip-flops where the output of one flip-flop is connected to the input of the next. They share a single clock signal, which causes the data stored in the system to shift from one location to the next. A shift register can shift the bits either to the left or to the right. Shift registers can have both parallel and serial inputs and outputs. These are often configured as “serial-in, parallel-out” (SIPO) or as “parallel-in, serial-out” (PISO). There are also types that have both serial and parallel input and types with serial and parallel output. There are also “bidirectional” shift registers, which allow shifting in both directions: (formula presented). The serial input and last output of a shift register can also be connected to create a “circular shift register”. This chapter studies the latches, flip flops and shift registers. © 2024, The Author(s), under exclusive license to Springer Nature Switzerland AG. | en_US |
| dc.identifier.doi | 10.1007/978-3-031-41516-6_7 | |
| dc.identifier.endpage | 180 | en_US |
| dc.identifier.issn | 1559-811X | |
| dc.identifier.scopus | 2-s2.0-85169685107 | en_US |
| dc.identifier.scopusquality | N/A | en_US |
| dc.identifier.startpage | 137 | en_US |
| dc.identifier.uri | https://doi.org/10.1007/978-3-031-41516-6_7 | |
| dc.identifier.uri | https://hdl.handle.net/20.500.12415/7340 | |
| dc.identifier.volume | Part F1328 | en_US |
| dc.indekslendigikaynak | Scopus | |
| dc.language.iso | en | en_US |
| dc.publisher | Springer Nature | en_US |
| dc.relation.ispartof | Synthesis Lectures on Electrical Engineering | en_US |
| dc.relation.publicationcategory | Kitap Bölümü - Uluslararası | en_US |
| dc.rights | info:eu-repo/semantics/closedAccess | en_US |
| dc.snmz | KY05426 | |
| dc.subject | Clocks | en_US |
| dc.subject | Flip Flop Circuits | en_US |
| dc.subject | Clock Input | en_US |
| dc.subject | Clock Pulse | en_US |
| dc.subject | Clock Signal | en_US |
| dc.subject | Falling Edge | en_US |
| dc.subject | Input And Outputs | en_US |
| dc.subject | Latch/Flip Flops | en_US |
| dc.subject | Pulse Input | en_US |
| dc.subject | Single Clock | en_US |
| dc.subject | Stable State | en_US |
| dc.subject | State Information | en_US |
| dc.subject | Shift Registers | en_US |
| dc.title | Latch, Flip Flop and Shift Register | en_US |
| dc.type | Book Chapter | |
| dspace.entity.type | Publication |
